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» Tolerance Models in Hardware Description Languages
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DATE
2000
IEEE
137views Hardware» more  DATE 2000»
13 years 10 months ago
Retargeting of Compiled Simulators for Digital Signal Processors Using a Machine Description Language
This paper presents a methodology to retarget the technique of compiled simulation for Digital Signal Processors DSPs using the modeling language LISA. In the past, the principl...
Stefan Pees, Andreas Hoffmann, Heinrich Meyr
ISSTA
2009
ACM
14 years 8 days ago
Specifying the worst case: orthogonal modeling of hardware errors
During testing, the execution of valid cases is only one part of the task. Checking the behavior in boundary situations and in the presence of errors is an equally important subje...
Jewgenij Botaschanjan, Benjamin Hummel
COMPSAC
2008
IEEE
14 years 7 days ago
Embedded Architecture Description Language
In the state-of-the-art hardware/software (HW/SW) codesign of embedded systems, there is a lack of sufficient support for architectural specifications across HW/SW boundaries. S...
Juncao Li, Nicholas T. Pilkington, Fei Xie, Qiang ...
MTV
2005
IEEE
100views Hardware» more  MTV 2005»
13 years 11 months ago
A Study of Architecture Description Languages from a Model-based Perspective
Abstract— Owing to the recent trend of using applicationspecific instruction-set processors (ASIP), many Architecture Description Languages (ADLs) have been created. They specif...
Wei Qin, Sharad Malik
ICFEM
2009
Springer
14 years 10 days ago
Role-Based Symmetry Reduction of Fault-Tolerant Distributed Protocols with Language Support
Fault-tolerant (FT) distributed protocols (such as group membership, consensus, etc.) represent fundamental building blocks for many practical systems, e.g., the Google File System...
Péter Bokor, Marco Serafini, Neeraj Suri, H...