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INFOCOM
2002
IEEE
13 years 10 months ago
Towards Simple, High-performance Schedulers for High-aggregate Bandwidth Switches
— High-aggregate bandwidth switches are those whose port count multiplied by the operating line rate is very high; for example, a 30 port switch operating at 40 Gbps or a 1000 po...
Paolo Giaccone, Balaji Prabhakar, Devavrat Shah
GLOBECOM
2006
IEEE
13 years 11 months ago
A Practical Switch-Memory-Switch Architecture Emulating PIFO OQ
— Emulating Output Queued (OQ) Switch with sustainable implementation cost and low fixed delay is always preferable in designing high performance routers. The SwitchMemory-Switch...
Nan Hua, Yang Xu, Peng Wang, Depeng Jin, Lieguang ...
RTAS
2006
IEEE
13 years 11 months ago
Switch Scheduling and Network Design for Real-Time Systems
The rapid need for high bandwidth and low latency communication in distributed real-time systems is driving system architects towards high-speed switches developed for high volume...
Sathish Gopalakrishnan, Marco Caccamo, Lui Sha