72 search results - page 1 / 15 » Towards a new standard for system-level design |
CODES
2000
IEEE
13 years 9 months ago
2000
IEEE
—Huge new design challenges for system-on-chip (SoC) are the result of decreasing time-to-market coupled with rapidly increasing gate counts and embedded software representing 50...
ICCD
2006
IEEE
14 years 1 months ago
2006
IEEE
Technology trends are driving parallel on-chip architectures in the form of multi-processor systems-on-a-chip (MPSoCs) and chip multi-processors (CMPs). In these systems the incre...
ISQED
2007
IEEE
13 years 10 months ago
2007
IEEE
With the increasing size and sophistication of circuits and specifically in the presence of IP blocks, new wirelength estimation methods are needed in the design flow of large-sca...
LCTRTS
2010
Springer
13 years 11 months ago
2010
Springer
This paper extends the methodology of analytic real-time analysis of distributed embedded systems towards merging and extracting sub-streams based on event type information. For e...
CODES
1999
IEEE
13 years 8 months ago
1999
IEEE
o much higher levels of abstraction than today's design practices, which are usually at the level of synthesizable RTL for custom hardware or Instruction Set Simulator (ISS) f...