5 search results - page 1 / 1 » Trace signal selection for visibility enhancement in post-si... |
ATS
2010
IEEE
13 years 2 months ago
2010
IEEE
One of the most challenging problems in post-silicon validation is to identify those errors that cause prohibitive extra delay on speedpaths in the circuit under debug (CUD) and o...
DAC
2009
ACM
14 years 5 months ago
2009
ACM
Post-silicon validation has become an essential step in the design flow of today's complex integrated circuits. One effective technique that provides real-time visibility to ...
DATE
2009
IEEE
13 years 11 months ago
2009
IEEE
Today’s complex integrated circuit designs increasingly rely on post-silicon validation to eliminate bugs that escape from presilicon verification. One effective silicon debug ...
ICCAD
2010
IEEE
13 years 2 months ago
2010
IEEE
Trace buffer technology allows tracking the values of a few number of state elements inside a chip within a desired time window, which is used to analyze logic errors during post-s...
DAC
2006
ACM
13 years 10 months ago
2006
ACM
Several emerging Design-for-Debug (DFD) methodologies are addressing silicon debug by making internal signal values and other data observable. Most of these methodologies require ...