42 search results - page 3 / 9 » Trace-Driven Simulation of Decoupled Architectures |
HPCA
1999
IEEE
13 years 9 months ago
1999
IEEE
This work presents and evaluates a novel processor microarchitecture which combines two paradigms: access/ execute decoupling and simultaneous multithreading. We investigate how b...
VLDB
2004
ACM
13 years 10 months ago
2004
ACM
As database application performance depends on the utilization of the memory hierarchy, smart data placement plays a central role in increasing locality and in improving memory ut...
ISCA
1999
IEEE
13 years 9 months ago
1999
IEEE
Providing adequate data bandwidth is extremely important for a wide-issue superscalar processor to achieve its full performance potential. Adding a large number of ports to a data...
ICS
2001
Tsinghua U.
13 years 9 months ago
2001
Tsinghua U.
The caching behavior of multimedia applications has been described as having high instruction reference locality within small loops, very large working sets, and poor data cache p...
JUCS
2000
13 years 5 months ago
2000
: This paper presents an evaluation of our Scheduled Dataflow (SDF) Processor. Recent focus in the field of new processor architectures is mainly on VLIW (e.g. IA-64), superscalar ...