44 search results - page 9 / 9 » Trace-Level Speculative Multithreaded Architecture |
ISSS
2002
IEEE
13 years 10 months ago
2002
IEEE
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...
HPCA
2008
IEEE
14 years 5 months ago
2008
IEEE
Simultaneous Multithreading (SMT) attempts to keep a dynamically scheduled processor's resources busy with work from multiple independent threads. Threads with longlatency st...
SIGMOD
2008
ACM
14 years 5 months ago
2008
ACM
Online Transaction Processing (OLTP) databases include a suite of features -- disk-resident B-trees and heap files, locking-based concurrency control, support for multi-threading ...
ICS
2007
Tsinghua U.
13 years 11 months ago
2007
Tsinghua U.
The register file is one of the most critical datapath components limiting the number of threads that can be supported on a Simultaneous Multithreading (SMT) processor. To allow t...