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DAC
2010
ACM
9 years 19 days ago
Tradeoff analysis and optimization of power delivery networks with on-chip voltage regulation
Integrating a large number of on-chip voltage regulators holds the promise of solving many power delivery challenges through strong local load regulation and facilitates systemlev...
Zhiyu Zeng, Xiaoji Ye, Zhuo Feng, Peng Li
ISQED
2006
IEEE
118views Hardware» more  ISQED 2006»
9 years 8 months ago
Localized On-Chip Power Delivery Network Optimization via Sequence of Linear Programming
— In this paper, we propose an efficient algorithm to reduce the voltage noises for on-chip power/ground (P/G) networks of VLSI. The new method is based on the sequence of linea...
Jeffrey Fan, I-Fan Liao, Sheldon X.-D. Tan, Yici C...
ISQED
2005
IEEE
119views Hardware» more  ISQED 2005»
9 years 8 months ago
Fast Decap Allocation Algorithm For Robust On-Chip Power Delivery
Adding on-chip decoupling capacitors (decaps) is an effective way to reduce voltage noise in power/ground networks and ensure robust power delivery. In this paper, we present a fa...
Zhenyu Qi, Hang Li, Sheldon X.-D. Tan, Lifeng Wu, ...
DAC
2007
ACM
10 years 3 months ago
Optimal Selection of Voltage Regulator Modules in a Power Delivery Network
High efficiency low voltage DC-DC conversion is a key enabler to the design of power-efficient integrated circuits. Typically a star configuration of the DC-DC converters, where o...
Behnam Amelifard, Massoud Pedram
DATE
2003
IEEE
154views Hardware» more  DATE 2003»
9 years 8 months ago
Packetized On-Chip Interconnect Communication Analysis for MPSoC
Interconnect networks play a critical role in shared memory multiprocessor systems-on-chip (MPSoC) designs. MPSoC performance and power consumption are greatly affected by the pac...
Terry Tao Ye, Luca Benini, Giovanni De Micheli
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