372 search results - page 1 / 75 » Transaction Based Modeling and Verification of Hardware Prot... |
FMCAD
2007
Springer
13 years 8 months ago
2007
Springer
Modeling hardware through atomic guard/action transitions with interleaving semantics is popular, owing to the conceptual clarity of modeling and verifying the high level behavior ...
DATE
2003
IEEE
13 years 9 months ago
2003
IEEE
We propose a new approach to accelerate transaction level verification by raising the productivity of the verification suites including test patterns, protocol checker, and simula...
DAC
2006
ACM
13 years 10 months ago
2006
ACM
This paper describes how systems companies are adopting SystemC transaction level models for system on chip design and verification, and how these transaction level models are bei...
DATE
2006
IEEE
13 years 10 months ago
2006
IEEE
Verification quality is a must for functional safety in electronic systems. In automotive, the verification flow is historically based on a layered approach, where each level (mod...
MICRO
2010
IEEE
12 years 11 months ago
2010
IEEE
Today's transactional memory systems implement the two-phase-locking (2PL) algorithm which aborts transactions every time a conflict happens. 2PL is a simple algorithm that pr...