Sciweavers

8 search results - page 1 / 2
» Transient bit error rate analysis of data recovery systems u...
Sort
View
ISCAS
2002
IEEE
87views Hardware» more  ISCAS 2002»
13 years 10 months ago
Transient bit error rate analysis of data recovery systems using jitter models
This paper presents a method for analyzing the Bit Error Rate of recovered data for PLL-based data recovery systems (DRS) as the PLL comes into lock. This method is based on the a...
Yonghui Tang, Randall L. Geiger
DATE
2000
IEEE
110views Hardware» more  DATE 2000»
13 years 10 months ago
Stochastic Modeling and Performance Evaluation for Digital Clock and Data Recovery Circuits
Clock and data recovery circuits are essential components in communication systems. They directly influence the bit-error-rate performance of communication links. It is desirable...
Alper Demir, Peter Feldmann
ISLPED
2005
ACM
96views Hardware» more  ISLPED 2005»
13 years 11 months ago
A low-power, multichannel gated oscillator-based CDR for short-haul applications
A gated current-controlled oscillator (GCCO) based topology is used to implement a low-power multi-channel clock and data recovery (CDR) system in a 0.18um digital CMOS technology...
Armin Tajalli, Paul Muller, Seyed Mojtaba Atarodi,...
ICCAD
2004
IEEE
141views Hardware» more  ICCAD 2004»
14 years 2 months ago
The effects of energy management on reliability in real-time embedded systems
Abstract—The slack time in real-time systems can be used by recovery schemes to increase system reliability as well as by frequency and voltage scaling techniques to save energy....
Dakai Zhu, Rami G. Melhem, Daniel Mossé
DSN
2003
IEEE
13 years 10 months ago
On the Design of Robust Integrators for Fail-Bounded Control Systems
This paper describes the design and evaluation of a robust integrator for software-implemented control systems. The integrator is constructed as a generic component in the Simulin...
Jonny Vinter, Andréas Johansson, Peter Folk...