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» Ultra low power digital signal processing
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DSD
2008
IEEE
187views Hardware» more  DSD 2008»
13 years 12 months ago
How to Live with Uncertainties: Exploiting the Performance Benefits of Self-Timed Logic In Synchronous Design
Ultra low power digital systems are key for any future wireless sensor nodes but also inside nomadic embedded systems (such as inside the digital front end of software defined rad...
Giacomo Paci, A. Nackaerts, Francky Catthoor, Luca...
ISCAS
1999
IEEE
102views Hardware» more  ISCAS 1999»
13 years 9 months ago
Power and signal integrity improvement in ultra high-speed current mode logic
Current mode (ECL) logic has long been the option of choice in those applications requiring logic functions at multigigahertz rates. This trend continues despite the obvious very ...
Hien Ha, Forrest Brewer
SAMOS
2004
Springer
13 years 10 months ago
A Low-Power Multithreaded Processor for Baseband Communication Systems
Embedded digital signal processors for baseband communication systems have stringent design constraints including high computational bandwidth, low power consumption, and low inter...
Michael J. Schulte, C. John Glossner, Suman Mamidi...
ICCAD
2000
IEEE
148views Hardware» more  ICCAD 2000»
13 years 9 months ago
Coupling-Driven Signal Encoding Scheme for Low-Power Interface Design
Coupling effects between on-chip interconnects must be addressed in ultra deep submicron VLSI and system-on-a-chip (SoC) designs. A new low-power bus encoding scheme is proposed t...
Ki-Wook Kim, Kwang-Hyun Baek, Naresh R. Shanbhag, ...
ALGOSENSORS
2004
Springer
13 years 10 months ago
WiseMAC: An Ultra Low Power MAC Protocol for Multi-hop Wireless Sensor Networks
WiseMAC is a medium access control protocol designed for wireless sensor networks. This protocol is based on non-persistent CSMA and uses the preamble sampling technique to minimiz...
Amre El-Hoiydi, Jean-Dominique Decotignie