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ICCD
2008
IEEE
194views Hardware» more  ICCD 2008»
14 years 1 months ago
Understanding performance, power and energy behavior in asymmetric multiprocessors
Abstract—Multiprocessor architectures are becoming popular in both desktop and mobile processors. Among multiprocessor architectures, asymmetric architectures show promise in sav...
Nagesh B. Lakshminarayana, Hyesoon Kim
PLDI
2011
ACM
12 years 7 months ago
Understanding POWER multiprocessors
Exploiting today’s multiprocessors requires highperformance and correct concurrent systems code (optimising compilers, language runtimes, OS kernels, etc.), which in turn requir...
Susmit Sarkar, Peter Sewell, Jade Alglave, Luc Mar...
DATE
2007
IEEE
105views Hardware» more  DATE 2007»
13 years 11 months ago
Understanding voltage variations in chip multiprocessors using a distributed power-delivery network
— Recent efforts to address microprocessor power dissipation through aggressive supply voltage scaling and power management require that designers be increasingly cognizant of po...
Meeta Sharma Gupta, Jarod L. Oatley, Russ Joseph, ...
CAV
2012
Springer
265views Hardware» more  CAV 2012»
11 years 7 months ago
An Axiomatic Memory Model for POWER Multiprocessors
The growing complexity of hardware optimizations employed by multiprocessors leads to subtle distinctions among allowed and disallowed behaviors, posing challenges in specifying th...
Sela Mador-Haim, Luc Maranget, Susmit Sarkar, Kayv...
ISCA
2005
IEEE
147views Hardware» more  ISCA 2005»
13 years 10 months ago
Interconnections in Multi-Core Architectures: Understanding Mechanisms, Overheads and Scaling
This paper examines the area, power, performance, and design issues for the on-chip interconnects on a chip multiprocessor, attempting to present a comprehensive view of a class o...
Rakesh Kumar, Victor V. Zyuban, Dean M. Tullsen