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DAC
2000
ACM
14 years 5 months ago
Practical iterated fill synthesis for CMP uniformity
We propose practical iterated methods for layout density control for CMP uniformity, based on linear programming, Monte-Carlo and greedy algorithms. We experimentally study the tr...
Yu Chen, Andrew B. Kahng, Gabriel Robins, Alexande...
TCAD
2002
135views more  TCAD 2002»
13 years 4 months ago
Area fill synthesis for uniform layout density
Chemical-mechanical polishing (CMP) and other manufacturing steps in very deep submicron VLSI have varying effects on device and interconnect features, depending on local character...
Yu Chen, Andrew B. Kahng, Gabriel Robins, Alexande...
ISQED
2007
IEEE
162views Hardware» more  ISQED 2007»
13 years 10 months ago
Balanced Scheduling and Operation Chaining in High-Level Synthesis for FPGA Designs
In high-level synthesis for FPGA designs, scheduling and chaining of operations for optimal performance remain challenging problems. In this paper, we present a balanced schedulin...
David Zaretsky, Gaurav Mittal, Robert P. Dick, Pri...
ASPDAC
2008
ACM
94views Hardware» more  ASPDAC 2008»
13 years 6 months ago
Robust on-chip bus architecture synthesis for MPSoCs under random tasks arrival
A major trend in a modern system-on-chip design is a growing system complexity, which results in a sharp increase of communication traffic on the on-chip communication bus architec...
Sujan Pandey, Rolf Drechsler
MCMASTER
1993
13 years 8 months ago
A Systolizing Compilation Scheme for Nested Loops with Linear Bounds
With the recent advances in massively parallel programmable processor networks, methods for the infusion of massive MIMD parallelism into programs have become increasingly relevant...
Michael Barnett, Christian Lengauer