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» Unifying synchronous asynchronous state machine synthesis
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VLSID
1997
IEEE
98views VLSI» more  VLSID 1997»
13 years 9 months ago
Synthesis for Logical Initializability of Synchronous Finite State Machines
—Logical initializability is the property of a gate-level circuit whereby it can be driven to a unique start state when simulated by a three-valued (0, 1, ) simulator. In practic...
Montek Singh, Steven M. Nowick
DAC
1991
ACM
13 years 9 months ago
A Unified Approach for the Synthesis of Self-Testable Finite State Machines
-Conventionallyself-test hardware is added after synthesis is completed. For highly sequential circuits like controllersthis design method eitherleads to high hardware overheadsor ...
Bernhard Eschermann, Hans-Joachim Wunderlich
ICCD
1992
IEEE
84views Hardware» more  ICCD 1992»
13 years 9 months ago
Synthesis of 3D Asynchronous State Machines
We describe a new synthesis procedure for designing asynchronous controllers from burst-mode specifications, a class of specifications allowing multiple input change fundamental m...
Kenneth Y. Yun, David L. Dill, Steven M. Nowick
FAC
2008
123views more  FAC 2008»
13 years 5 months ago
Interface synthesis and protocol conversion
Given deterministic interfaces P and Q, we investigate the problem of synthesising an interface R such that P composed with R refines Q. We show that a solution exists iff P and Q ...
Purandar Bhaduri, S. Ramesh
CSR
2006
Springer
13 years 9 months ago
Unfolding Synthesis of Asynchronous Automata
Zielonka's theorem shows that each regular set of Mazurkiewicz traces can be implemented as a system of synchronized processes provided with some distributed control structure...
Nicolas Baudru, Rémi Morin