2 search results - page 1 / 1 » Useful Application of CMOS Ternary Logic to the Realisation ... |
ISMVL
1997
IEEE
13 years 8 months ago
1997
IEEE
This paper shows how the application of a CMOS ternary logic is useful in the realisation of Delay Insensitive (01)asynchronous circuits. It is shown that fully DIasynchronous cir...
ASYNC
1997
IEEE
13 years 8 months ago
1997
IEEE
The realisation of Delay-Insensitive (DI) asynchronous circuits with a CMOS ternary logic is described in this paper. The main advantage of temary logic is the easy realisation of...