122 search results - page 2 / 25 » User-controllable coherence for high performance shared memo... |
SOSP
1997
ACM
13 years 7 months ago
1997
ACM
Low-latency remote-write networks, such as DEC’s Memory Channel, provide the possibility of transparent, inexpensive, large-scale shared-memory parallel computing on clusters of...
ISCA
1994
IEEE
13 years 10 months ago
1994
IEEE
This paper evaluates the tradeoffs involved in the design of the software-extended memory system of Alewife, a multiprocessor architecturethat implements coherentsharedmemorythrou...
ISPASS
2007
IEEE
14 years 1 days ago
2007
IEEE
Address re-mapping techniques in so-called active memory systems have been shown to dramatically increase the performance of applications with poor cache and/or communication beha...
HPCA
2005
IEEE
14 years 6 months ago
2005
IEEE
With the increasing concern of the security on high performance multiprocessor enterprise servers, more and more effort is being invested into defending against various kinds of a...
HPCA
2000
IEEE
13 years 10 months ago
2000
IEEE
Abstract—Sharing patterns in shared-memory multiprocessors are the key to performance: uniprocessor latencytolerating techniques such as out-of-order execution and non-blocking c...