70 search results - page 2 / 14 » Using Abstraction in the Verification of Simulation Coercion |
LICS
1994
IEEE
13 years 9 months ago
1994
IEEE
In this paper we study the interaction of subtyping and parametricity. We describe a logic for a programming language with parametric polymorphism and subtyping. The logic support...
CAV
2007
Springer
13 years 9 months ago
2007
Springer
Abstract. In this paper, we describe the features of the Timed Abstract State Machine toolset. The toolset implements the features of the Timed Abstract State Machine (TASM) langua...
DATE
1998
IEEE
13 years 9 months ago
1998
IEEE
One of the main tasks within the high-level synthesis (HLS) process is the verification problem to prove automatically the correctness of the synthesis results. Currently, the res...
TPHOL
1998
IEEE
13 years 9 months ago
1998
IEEE
Abstraction in a Higher-Order Logic Framework Marco Benini Sara Kalvala Dirk Nowotka Department of Computer Science University of Warwick, Coventry, CV4 7AL, United Kingdom We pres...
ICCAD
2002
IEEE
14 years 2 months ago
2002
IEEE
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...