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FMCAD
2008
Springer
13 years 7 months ago
Word-Level Sequential Memory Abstraction for Model Checking
el Sequential Memory Abstraction for Model Checking Per Bjesse Advanced Technology Group Synopsys Inc. Many designs intermingle large memories with wide data paths and nontrivial c...
Per Bjesse
SIGSOFT
2006
ACM
13 years 11 months ago
Bit level types for high level reasoning
Bitwise operations are commonly used in low-level systems code to access multiple data fields that have been packed into a single word. Program analysis tools that reason about s...
Ranjit Jhala, Rupak Majumdar
PST
2008
13 years 7 months ago
Model-Checking for Software Vulnerabilities Detection with Multi-Language Support
In this paper we develop a security verification framework for open source software with a multi-language support. We base our approach on the GCC compiler which is considered as ...
Rachid Hadjidj, Xiaochun Yang, Syrine Tlili, Moura...
FM
1999
Springer
121views Formal Methods» more  FM 1999»
13 years 10 months ago
Incremental Design of a Power Transformer Station Controller Using a Controller Synthesis Methodology
ÐIn this paper, we describe the incremental specification of a power transformer station controller using a controller synthesis methodology. We specify the main requirements as s...
Hervé Marchand, Mazen Samaan
FMCAD
2004
Springer
13 years 9 months ago
Verification of Analog and Mixed-Signal Circuits Using Hybrid System Techniques
In this paper we demonstrate a potential extension of formal verification methodology in order to deal with time-domain properties of analog and mixed-signal circuits whose dynamic...
Thao Dang, Alexandre Donzé, Oded Maler