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» Using Lamport Clocks to Reason about Relaxed Memory Models
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HPCA
1999
IEEE
13 years 8 months ago
Using Lamport Clocks to Reason about Relaxed Memory Models
Cache coherence protocols of current shared-memory multiprocessors are difficult to verify. Our previous work proposed an extension of Lamport's logical clocks for showing th...
Anne Condon, Mark D. Hill, Manoj Plakal, Daniel J....
SPAA
1998
ACM
13 years 8 months ago
Lamport Clocks: Verifying a Directory Cache-Coherence Protocol
Modern shared-memory multiprocessors use complex memory system implementations that include a variety of non-trivial and interacting optimizations. More time is spent in verifying...
Manoj Plakal, Daniel J. Sorin, Anne Condon, Mark D...
ECOOP
2010
Springer
13 years 9 months ago
Reasoning about the Implementation of Concurrency Abstractions on x86-TSO
ncy Abstractions on x86-TSO Scott Owens University of Cambridge Abstract. With the rise of multi-core processors, shared-memory concurrency has become a widespread feature of compu...
Scott Owens
FASE
2008
Springer
13 years 6 months ago
A Generic Complete Dynamic Logic for Reasoning About Purity and Effects
For a number of programming languages, among them Eiffel, C, Java and Ruby, Hoare-style logics and dynamic logics have been developed. In these logics, pre- and postconditions are ...
Till Mossakowski, Lutz Schröder, Sergey Gonch...
PLDI
2012
ACM
11 years 7 months ago
Dynamic synthesis for relaxed memory models
Modern architectures implement relaxed memory models which may reorder memory operations or execute them non-atomically. Special instructions called memory fences are provided, al...
Feng Liu, Nayden Nedev, Nedyalko Prisadnikov, Mart...