11 search results - page 1 / 3 » Using Reconfigurable Logic to Optimise GPU Memory Accesses |
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
TC
2010
12 years 11 months ago
2010
A systematic approach to the comparison of the graphics processor (GPU) and reconfigurable logic is defined in terms of three throughput drivers. The approach is applied to five ca...
FPL
2000
Springer
13 years 8 months ago
2000
Springer
abstract the dynamic nature of a computation to embedded data memory (which is accessible on-chip). The dynamic nature of a computation corresponds to the dynamic features of its i...
FPL
2000
Springer
13 years 8 months ago
2000
Springer
Abstract. This paper presents an innovative architecture for a reconfigurable device that allows single cycle context switching and single cycle random access to the unified on-chi...
BCS
2008
13 years 6 months ago
2008
This paper describes a customisable processor designed to accelerate execution of inductive logic programming, targeting advanced field-programmable gate array (FPGA) technology. ...