2 search results - page 1 / 1 » Using binary translation in event driven simulation for fast... |
CODES
2009
IEEE
13 years 11 months ago
2009
IEEE
In this paper, we investigate the use of instruction set simulators (ISS) based on binary translation to accelerate full timed multiprocessor system simulation at transaction leve...
SIGMETRICS
1996
ACM
13 years 8 months ago
1996
ACM
This paper describes Embra, a simulator for the processors, caches, and memory systems of uniprocessors and cache-coherent multiprocessors. When running as part of the SimOS simul...