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HPCA
2008
IEEE
14 years 6 months ago
Automated microprocessor stressmark generation
Estimating the maximum power and thermal characteristics of a processor is essential for designing its power delivery system, packaging, cooling, and power/thermal management sche...
Ajay M. Joshi, Lieven Eeckhout, Lizy Kurian John, ...
CLUSTER
2003
IEEE
13 years 11 months ago
Parallel Design Pattern for Computational Biology and Scientific Computing Applications
Dynamic programming is an important algorithm design technique in computational biology and scientific computing. Typical applications using this technique are very compute-intens...
Weiguo Liu, Bertil Schmidt
FMCAD
2000
Springer
13 years 9 months ago
Scalable Distributed On-the-Fly Symbolic Model Checking
Abstract. This paper presents a scalable method for parallel symbolic on-the-fly model checking in a distributed memory environment. Our method combines a scheme for on-the-fly mod...
Shoham Ben-David, Tamir Heyman, Orna Grumberg, Ass...
VLSID
1997
IEEE
135views VLSI» more  VLSID 1997»
13 years 10 months ago
Parallel Genetic Algorithms for Simulation-Based Sequential Circuit Test Generation
The problem of test generation belongs to the class of NP-complete problems and it is becoming more and more di cult as the complexity of VLSI circuits increases, and as long as e...
Dilip Krishnaswamy, Michael S. Hsiao, Vikram Saxen...
IPPS
2007
IEEE
14 years 14 days ago
A Portable Framework for High-Speed Parallel Producer/Consumers on Real CMP, SMT and SMP Architectures
This paper explores generating efficient, portable HighSpeed Producer Consumer (HSPC) code on current shared memory architectures: Chip Multi-Processors (CMP), Simultaneous Multi...
Richard T. Saunders, Clinton L. Jeffery, Derek T. ...