29 search results - page 3 / 6 » Using thread-level speculation to simplify manual paralleliz... |
ASPLOS
2010
ACM
14 years 18 days ago
2010
ACM
With the right techniques, multicore architectures may be able to continue the exponential performance trend that elevated the performance of applications of all types for decades...
ICPP
2007
IEEE
14 years 1 days ago
2007
IEEE
As multi-core microprocessors are becoming widely adopted, the need to extract thread-level parallelism (TLP) from single-threaded applications in a seamless fashion increases. In...
IWMM
2010
Springer
13 years 10 months ago
2010
Springer
With the availability of chip multiprocessor (CMP) and simultaneous multithreading (SMT) machines, extracting thread level parallelism from a sequential program has become crucial...
ISCA
2006
IEEE
13 years 11 months ago
2006
IEEE
Transactional Memory (TM), Thread-Level Speculation (TLS), and Checkpointed multiprocessors are three popular architectural techniques based on the execution of multiple, cooperat...
PPOPP
2006
ACM
13 years 11 months ago
2006
ACM
As multi-core architectures with Thread-Level Speculation (TLS) are becoming better understood, it is important to focus on TLS compilation. TLS compilers are interesting in that,...