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» VCO Jitter Simulation and Its Comparison With Measurement
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ASPDAC
1999
ACM
87views Hardware» more  ASPDAC 1999»
13 years 9 months ago
VCO Jitter Simulation and Its Comparison With Measurement
Masayuki Takahashi, Kimihiro Ogawa, Kenneth S. Kun...
ICCD
2001
IEEE
88views Hardware» more  ICCD 2001»
14 years 1 months ago
Jitter-Induced Power/ground Noise in CMOS PLLs: A Design Perspective
CMOS Phase-locked loops (PLL) are ubiquitous in RF and mixed-signal integrated circuits. PLLs are very sensitive to noise fluctuations on the power and ground rails. In this paper...
Payam Heydari, Massoud Pedram
SBCCI
2005
ACM
132views VLSI» more  SBCCI 2005»
13 years 10 months ago
Design and power optimization of CMOS RF blocks operating in the moderate inversion region
In this work the design of radiofrequency CMOS circuit blocks in the 910MHz ISM band, while biasing the MOS transistor in the moderate inversion region, is analyzed. An amplifier ...
Leonardo Barboni, Rafaella Fiorelli
ISBI
2009
IEEE
13 years 11 months ago
Fundamental Analysis of Lateral Displacement Estimation Quality in Ultrasound Elastography
Complementary to axial, lateral displacement and strain can provide important information on the biological soft tissues in all applications of elastography. In this paper, the ef...
Jianwen Luo, Elisa E. Konofagou
ETT
2006
138views Education» more  ETT 2006»
13 years 4 months ago
Comparison of modified dual queue and EDCA for VoIP over IEEE 802.11 WLAN
The popular IEEE 802.11 WLAN today does not provide any quality-of-service (QoS) because of its contention-based channel access nature of the medium access control (MAC). Therefore...
Jeonggyun Yu, Sunghyun Choi