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» VHDL-based communication and synchronization synthesis
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EURODAC
1995
IEEE
153views VHDL» more  EURODAC 1995»
13 years 8 months ago
VHDL-based communication and synchronization synthesis
This paper describes an approach for VHDL-based communication and synchronization synthesis. This design step transforms a system level VHDL description into an RT-level descripti...
Wolfgang Ecker, Manfred Huber
IFIP
2010
Springer
12 years 11 months ago
Dependency-Driven Distribution of Synchronous Programs
Abstract In this paper, we describe an automatic synthesis procedure that distributes synchronous programs on a set of desynchronized processing elements. Our distribution procedur...
Daniel Baudisch, Jens Brandt, Klaus Schneider
ICCAD
2003
IEEE
175views Hardware» more  ICCAD 2003»
14 years 1 months ago
Architectural Synthesis Integrated with Global Placement for Multi-Cycle Communication
Multiple clock cycles are needed to cross the global interconnects for multi-gigahertz designs in nanometer technologies. For synchronous design, this requires the consideration o...
Jason Cong, Yiping Fan, Guoling Han, Xun Yang, Zhi...
FPL
2010
Springer
106views Hardware» more  FPL 2010»
13 years 2 months ago
Increasing Design Productivity through Core Reuse, Meta-data Encapsulation, and Synthesis
This paper presents a novel IP core reuse strategy which reduces design time from days to hours for communication circuits such as digital radio receivers. This design productivity...
Adam Arnesen, Kevin Ellsworth, Derrick Gibelyou, T...
ISSS
1998
IEEE
104views Hardware» more  ISSS 1998»
13 years 8 months ago
Synchronization Detection for Multi-Process Hierarchical Synthesis
Complex system specifications are often hierarchically composed of several subsystems. Each subsystem contains one or more processes. In order to provide optimization across diffe...
Oliver Bringmann, Wolfgang Rosenstiel, Dirk Reicha...