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DSD
2008
IEEE
110views Hardware» more  DSD 2008»
13 years 5 months ago
VLSI Implementation of a Cryptography-Oriented Reconfigurable Array
The long-word and very long-word addition required in cryptography applications generally requires custom hardware support provided by ASICs or application-specific instructions i...
Scott Miller, Ambrose Chu, Mihai Sima, Michael McG...
RECONFIG
2008
IEEE
122views VLSI» more  RECONFIG 2008»
13 years 10 months ago
Using a CSP Based Programming Model for Reconfigurable Processor Arrays
The growing trend towards adoption of flexible and heterogeneous, parallel computing architectures has increased the challenges faced by the programming community. We propose a me...
Zain-ul-Abdin, Bertil Svensson
FCCM
1998
IEEE
116views VLSI» more  FCCM 1998»
13 years 7 months ago
A Reconfigurable Multiplier Array For Video Image Processing Tasks, Suitable For Embedding In An FPGA Structure
Abstract This paper presents a design for a reconfigurable multiplier array. The multiplier is constructed using an array of 4 bit Flexible Array Blocks (FABs), which could be emb...
Simon D. Haynes, Peter Y. K. Cheung
ISVLSI
2006
IEEE
126views VLSI» more  ISVLSI 2006»
13 years 9 months ago
QUKU: A Two-Level Reconfigurable Architecture
FPGAs have been used for prototyping of ASICs, for low-volume ASIC replacement and for systems requiring in-field hardware upgrades. However, the potential to use dynamic reconfig...
Sunil Shukla, Neil W. Bergmann, Jürgen Becker
FCCM
2006
IEEE
201views VLSI» more  FCCM 2006»
13 years 7 months ago
Hardware/Software Approach to Molecular Dynamics on Reconfigurable Computers
With advances in reconfigurable hardware, especially field-programmable gate arrays (FPGAs), it has become possible to use reconfigurable hardware to accelerate complex applicatio...
Ronald Scrofano, Maya Gokhale, Frans Trouw, Viktor...