Sciweavers

17 search results - page 4 / 4
» Valiant's Universal Circuit is Practical
Sort
View
ICCAD
2004
IEEE
191views Hardware» more  ICCAD 2004»
14 years 1 months ago
Checking consistency of C and Verilog using predicate abstraction and induction
edicate Abstraction and Induction Edmund Clarke Daniel Kroening June 25, 2004 CMU-CS-04-131 School of Computer Science Carnegie Mellon University Pittsburgh, PA 15213 It is common...
Daniel Kroening, Edmund M. Clarke
IFIP
2001
Springer
13 years 9 months ago
Random Adjacent Sequences: An Efficient Solution for Logic BIST
: High defect coverage requires good coverage of different fault types. In this paper, we present a comprehensive test vector generation technique for BIST, called Random Single In...
René David, Patrick Girard, Christian Landr...