266 search results - page 1 / 54 » Vector instruction set support for conditional operations |
ISCA
2000
IEEE
13 years 8 months ago
2000
IEEE
Vector instruction sets are receiving renewed interest because of their applicability to multimedia. Current multimedia instruction sets use short vectors with SIMD implementation...
ISCA
2008
IEEE
13 years 11 months ago
2008
IEEE
The current trend is for processors to deliver dramatic improvements in parallel performance while only modestly improving serial performance. Parallel performance is harvested th...
VEE
2006
ACM
13 years 10 months ago
2006
ACM
We present Vector LLVA, a virtual instruction set architecture (VISA) that exposes extensive static information about vector parallelism while avoiding the use of hardware-speci...
IEEEPACT
2002
IEEE
13 years 9 months ago
2002
IEEE
Traditional compilers perform their code generation tasks based on a fixed, pre-determined instruction set. This paper describes the implementation of a compiler that determines ...
ICML
2008
IEEE
14 years 5 months ago
2008
IEEE
We propose a new stopping condition for a Support Vector Machine (SVM) solver which precisely reflects the objective of the Leave-OneOut error computation. The stopping condition ...