33 search results - page 2 / 7 » Verification by Parallelization of Parametric Code |
ICS
2009
Tsinghua U.
14 years 1 days ago
2009
Tsinghua U.
Tiling is a crucial loop transformation for generating high performance code on modern architectures. Efficient generation of multilevel tiled code is essential for maximizing da...
EUROMICRO
2007
IEEE
13 years 11 months ago
2007
IEEE
Code model checking of software components suffers from the well-known problem of state explosion when applied to highly parallel components, despite the fact that a single compon...
PIMRC
2008
IEEE
13 years 11 months ago
2008
IEEE
—A constant envelope Continuous Phase Modulation (CPM) class of Multi-Channel (MC) modulations for multiantenna transmitters is considered. Each receive antenna receives a superp...
CGO
2010
IEEE
14 years 5 days ago
2010
IEEE
Tiling, a key transformation for optimizing programs, has been widely studied in literature. Parameterized tiled code is important for auto-tuning systems since they often execute...
ISSTA
2010
ACM
13 years 7 months ago
2010
ACM
SAT-based bounded verification of annotated code consists of translating the code together with the annotations to a propositional formula, and analyzing the formula for specifica...