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DATE
2005
IEEE
99views Hardware» more  DATE 2005»
13 years 10 months ago
Verification of Embedded Memory Systems using Efficient Memory Modeling
Malay K. Ganai, Aarti Gupta, Pranav Ashar
TACAS
1998
Springer
98views Algorithms» more  TACAS 1998»
13 years 9 months ago
Efficient Modeling of Memory Arrays in Symbolic Ternary Simulation
This paper enables symbolic ternary simulation of systems with large embedded memories. Each memory array is replaced with a behavioral model, where the number of symbolic variable...
Miroslav N. Velev, Randal E. Bryant
ENTCS
2008
94views more  ENTCS 2008»
13 years 5 months ago
A Formal Model of Memory Peculiarities for the Verification of Low-Level Operating-System Code
This paper presents our solutions to some problems we encountered in an ongoing attempt to verify the micro-hypervisor currently developed within the Robin project. The problems t...
Hendrik Tews, Tjark Weber, Marcus Völp
DDECS
2007
IEEE
201views Hardware» more  DDECS 2007»
13 years 11 months ago
Built in Defect Prognosis for Embedded Memories
: As scan compression replaces the traditional scan it is important to understand how it works with power. DFT MAX represents one of the two primary scan compression solutions used...
Prashant Dubey, Akhil Garg, Sravan Kumar Bhaskaran...
ICCD
2003
IEEE
140views Hardware» more  ICCD 2003»
14 years 1 months ago
Cost-Efficient Memory Architecture Design of NAND Flash Memory Embedded Systems
NAND flash memory has become an indispensable component in embedded systems because of its versatile features such as non-volatility, solid-state reliability, low cos,t and high d...
Chanik Park, Jaeyu Seo, Dongyoung Seo, Shinhan Kim...