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TC
2010
13 years 5 days ago
Architectures and Execution Models for Hardware/Software Compilation and Their System-Level Realization
We propose an execution model that orchestrates the fine-grained interaction of a conventional general-purpose processor (GPP) and a high-speed reconfigurable hardware accelerator ...
Holger Lange, Andreas Koch
MEMOCODE
2003
IEEE
13 years 10 months ago
MoDe: A Method for System-Level Architecture Evaluation
System-level design methodologies for embedded HW/SW systems face several challenges: In order to be susceptible to systematic formal analysis based on state-space exploration, a ...
Jan Romberg, Oscar Slotosch, Gabor Hahn
GECCO
2003
Springer
120views Optimization» more  GECCO 2003»
13 years 10 months ago
System-Level Synthesis of MEMS via Genetic Programming and Bond Graphs
Initial results have been achieved for automatic synthesis of MEMS system-level lumped parameter models using genetic programming and bond graphs. This paper first discusses the ne...
Zhun Fan, Kisung Seo, Jianjun Hu, Ronald C. Rosenb...
ISDA
2008
IEEE
13 years 12 months ago
Constructing Intelligent Living Space Controlling System with Bluetooth and Speech-Recognition Microprocessor
This study focused on designing an intelligent living-space with automatic control system to control all home appliances in the space. First of all, the system was constructed wit...
Chun-Liang Hsu, Sheng-Yuan Yang
WADT
2001
Springer
13 years 10 months ago
Verifying a Simple Pipelined Microprocessor Using Maude
Abstract. We consider the verification of a simple pipelined microprocessor in Maude, by implementing an equational theoretical model of systems. Maude is an equationally-based la...
Neal A. Harman