2 search results - page 1 / 1 » Verifying Parametrised Hardware Designs Via Counter Automata |
HVC
2007
Springer
13 years 10 months ago
2007
Springer
The paper presents a new approach to formal verification of generic (i.e. parametrised) hardware designs specified in VHDL. The proposed approach is based on a translation of suc...
ATVA
2007
Springer
13 years 8 months ago
2007
Springer
One of the prerequisites for information society is secure and reliable communication among computing systems. Accordingly, network security appliances become key components of inf...