3 search results - page 1 / 1 » Verifying Stateful Timed CSP Using Implicit Clocks and Zone ... |
ICFEM
2009
Springer
14 years 9 days ago
2009
Springer
ICFEM
2010
Springer
13 years 4 months ago
2010
Springer
Abstract. The success of industrial-scale model checkers such as Uppaal [3] or NuSMV [12] relies on the efficiency of their respective symbolic state space representations. While d...
CONCUR
1999
Springer
13 years 10 months ago
1999
Springer
Abstract. The paper presents a partial order reduction method applicable to networks of timed automata. The advantage of the method is that it reduces both the number of explored c...