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» Very Low Voltage Testing of SOI Integrated Circuits
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VTS
2002
IEEE
121views Hardware» more  VTS 2002»
10 years 4 months ago
Very Low Voltage Testing of SOI Integrated Circuits
Very Low Voltage (VLV) testing has been proposed to increase flaw detection in bulk silicon CMOS integrated circuits and this paper explores these and additional advantages in the...
Eric MacDonald, Nur A. Touba
ARVLSI
2001
IEEE
305views VLSI» more  ARVLSI 2001»
10 years 3 months ago
Logic Design Considerations for 0.5-Volt CMOS
As the operating supply voltage for commercial CMOS devices falls below 2 V, research activities are underway to develop CMOS integrated circuits that can operate at supply voltag...
K. Joseph Hass, Jack Venbrux, Prakash Bhatia
DDECS
2006
IEEE
101views Hardware» more  DDECS 2006»
10 years 5 months ago
Embedded Built-In-Test Detection Circuit for Radio Frequency Systems and Circuits
: An embedded rectifier-based Built-In-Test (BIT) detection circuit for the RF integrated circuits is proposed in this work, and charge pump rectifier is adopted to transform the R...
Guoyan Zhang, Ronan Farrell
GLVLSI
2003
IEEE
167views VLSI» more  GLVLSI 2003»
10 years 5 months ago
New approach to CMOS current reference with very low temperature coefficient
A novel CMOS current reference circuit with very low temperature coefficient is realized, by compensating the temperature performance of the resistor. This circuit gives out a cur...
Jiwei Chen, Bingxue Shi
DAC
2004
ACM
10 years 5 months ago
Low voltage swing logic circuits for a Pentium 4 processor integer core
The PentiumĀ® 4 processor architecture uses a 2x frequency core clock[1] to implement low latency integer ops. Low Voltage Swing logic circuits implemented in 90nm technology[2] m...
Daniel J. Deleganes, Micah Barany, George Geannopo...
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