10 search results - page 1 / 2 » Visibility enhancement for silicon debug |
DAC
2006
ACM
13 years 10 months ago
2006
ACM
Several emerging Design-for-Debug (DFD) methodologies are addressing silicon debug by making internal signal values and other data observable. Most of these methodologies require ...
DATE
2009
IEEE
13 years 11 months ago
2009
IEEE
Today’s complex integrated circuit designs increasingly rely on post-silicon validation to eliminate bugs that escape from presilicon verification. One effective silicon debug ...
ICCD
2006
IEEE
14 years 1 months ago
2006
IEEE
Abstract— This paper presents techniques that enhance automatically generated hardware assertion checkers to facilitate debugging within the assertion-based verification paradig...
DFT
2008
IEEE
13 years 10 months ago
2008
IEEE
Scan-based debug methods give high observability of internal signals, however, they require halting the system to scan out responses from the circuit-under-debug (CUD). This is ti...
ATS
2010
IEEE
13 years 2 months ago
2010
IEEE
One of the most challenging problems in post-silicon validation is to identify those errors that cause prohibitive extra delay on speedpaths in the circuit under debug (CUD) and o...