10 search results - page 2 / 2 » Visibility enhancement for silicon debug |
ASPDAC
2010
ACM
13 years 2 months ago
2010
ACM
It is increasingly difficult to guarantee the first silicon success for complex integrated circuit (IC) designs. Post-silicon validation has thus become an essential step in the I...
ICCAD
2010
IEEE
13 years 2 months ago
2010
IEEE
Trace buffer technology allows tracking the values of a few number of state elements inside a chip within a desired time window, which is used to analyze logic errors during post-s...
DAC
2009
ACM
14 years 5 months ago
2009
ACM
Post-silicon validation has become an essential step in the design flow of today's complex integrated circuits. One effective technique that provides real-time visibility to ...
DATE
2007
IEEE
13 years 10 months ago
2007
IEEE
Scan chain defect diagnosis is important to silicon debug and yield enhancement. Traditional simulationbased chain diagnosis algorithms may take long run time if a large number of...
DATE
2009
IEEE
13 years 11 months ago
2009
IEEE
Abstract—Addressing both standby and active power is a major challenge in developing System-on-Chip designs for batterypowered products. Powering off sections of logic or memorie...