4 search results - page 1 / 1 » WCET-Centric Software-controlled Instruction Caches for Hard... |
ECRTS
2006
IEEE
13 years 10 months ago
2006
IEEE
Cache memories have been extensively used to bridge the gap between high speed processors and relatively slower main memories. However, they are sources of predictability problems...
RTAS
2008
IEEE
13 years 11 months ago
2008
IEEE
Instruction scratchpads have been previously suggested as a way to reduce the worst case execution time (WCET) of hard real-time programs without introducing the analysis issues p...
DAC
2010
ACM
13 years 4 months ago
2010
ACM
The performance of most embedded systems is critically dependent on the average memory access latency. Improving the cache hit rate can have significant positive impact on the per...
IPPS
1998
IEEE
13 years 8 months ago
1998
IEEE
In this paper, we present several novel strategies to improve software controlled cache utilization, so as to achieve lower power requirements for multi-media and signal processin...