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ICCAD
2002
IEEE
110views Hardware» more  ICCAD 2002»
14 years 1 months ago
Whirlpool PLAs: a regular logic structure and their synthesis
 A regular circuit structure called a Whirlpool PLA (WPLA) is proposed. It is suitable for the implementation of finite state machines as well as combinational logic. A WPLA is ...
Fan Mo, Robert K. Brayton
DAC
2002
ACM
14 years 5 months ago
River PLAs: a regular circuit structure
A regular circuit structure called a River PLA and its reconfigurable version, Glacier PLA, are presented. River PLAs provide greater regularity than circuits implemented with sta...
Fan Mo, Robert K. Brayton
DAC
2006
ACM
14 years 5 months ago
Topology aware mapping of logic functions onto nanowire-based crossbar architectures
Highly regular, nanodevice based architectures have been proposed to replace pure CMOS based architectures in the emerging post CMOS era. Since bottom-up self-assembly is used to ...
Wenjing Rao, Alex Orailoglu, Ramesh Karri
ICCAD
2005
IEEE
113views Hardware» more  ICCAD 2005»
14 years 1 months ago
Synthesis methodology for built-in at-speed testing
We discuss a new synthesis flow, which offers the ability to do easy delay testing almost free in terms of its impact on speed and area as compared to corresponding implementation...
Yinghua Li, Alex Kondratyev, Robert K. Brayton
DSN
2007
IEEE
13 years 11 months ago
Fault Tolerant Approaches to Nanoelectronic Programmable Logic Arrays
Programmable logic arrays (PLA), which can implement arbitrary logic functions in a two-level logic form, are promising as platforms for nanoelectronic logic due to their highly r...
Wenjing Rao, Alex Orailoglu, Ramesh Karri