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VLSID
2004
IEEE
73views VLSI» more  VLSID 2004»
14 years 5 months ago
Wire Swizzling to Reduce Delay Uncertainty Due to Capacitive Coupling
Reduction of worst-case delay and delay uncertainty due to capacitive coupling is a still unsolved problem in physical design. We describe a routing only layout solution - swizzli...
Puneet Gupta, Andrew B. Kahng
ICCD
2006
IEEE
94views Hardware» more  ICCD 2006»
14 years 1 months ago
Quantitative Prediction of On-chip Capacitive and Inductive Crosstalk Noise and Discussion on Wire Cross-Sectional Area Toward I
Abstract— Capacitive and inductive crosstalk noises are expected to be more serious in advanced technologies. However, capacitive and inductive crosstalk noises in the future hav...
Yasuhiro Ogasahara, Masanori Hashimoto, Takao Onoy...
TVLSI
2002
144views more  TVLSI 2002»
13 years 4 months ago
On-chip inductance cons and pros
Abstract--This paper provides a high level survey of the increasing effects of on-chip inductance. These effects are classified into desirable and nondesirable effects. Among the u...
Yehea I. Ismail
DAC
2003
ACM
13 years 10 months ago
Crosstalk noise in FPGAs
In recent years, due to rapid advances in VLSI manufacturing technology capable of packing more and more devices and wires on a chip, crosstalk has emerged as a serious problem af...
Yajun Ran, Malgorzata Marek-Sadowska
ICCAD
2001
IEEE
84views Hardware» more  ICCAD 2001»
14 years 1 months ago
Minimum-Buffered Routing of Non-Critical Nets for Slew Rate and Reliability Control
In high-speed digital VLSI design, bounding the load capacitance at gate outputs is a well-known methodology to improve coupling noise immunity, reduce degradation of signal trans...
Charles J. Alpert, Andrew B. Kahng, Bao Liu, Ion I...