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CDES
2006
158views Hardware» more  CDES 2006»
13 years 6 months ago
A Double Precision Floating Point Multiplier Suitably Designed for FPGAs and ASICs
In this paper, a double precision IEEE 754 floating-point multiplier with high speed and low power is presented. The bottleneck of any double precision floatingpoint multiplier des...
Himanshu Thapliyal, Vishal Verma, Hamid R. Arabnia
IPL
2010
134views more  IPL 2010»
13 years 8 days ago
Parameterized algorithm for eternal vertex cover
In this paper we initiate the study of a "dynamic" variant of the classical Vertex Cover problem, the Eternal Vertex Cover problem introduced by Klostermeyer and Mynhard...
Fedor V. Fomin, Serge Gaspers, Petr A. Golovach, D...