Sciweavers

12 search results - page 2 / 3
» Worst-case circuit delay taking into account power supply va...
Sort
View
DAC
2003
ACM
13 years 9 months ago
Crosstalk noise in FPGAs
In recent years, due to rapid advances in VLSI manufacturing technology capable of packing more and more devices and wires on a chip, crosstalk has emerged as a serious problem af...
Yajun Ran, Malgorzata Marek-Sadowska
TCAD
2010
107views more  TCAD 2010»
12 years 11 months ago
Evaluating Statistical Power Optimization
In response to the increasing variations in integrated-circuit manufacturing, the current trend is to create designs that take these variations into account statistically. In this ...
Jason Cong, Puneet Gupta, John Lee
MICRO
2006
IEEE
145views Hardware» more  MICRO 2006»
13 years 10 months ago
A Floorplan-Aware Dynamic Inductive Noise Controller for Reliable Processor Design
Power delivery is a growing reliability concern in microprocessors as the industry moves toward feature-rich, powerhungrier designs. To battle the ever-aggravating power consumpti...
Fayez Mohamood, Michael B. Healy, Sung Kyu Lim, Hs...
ASPDAC
2009
ACM
142views Hardware» more  ASPDAC 2009»
13 years 11 months ago
On the futility of statistical power optimization
In response to the increasing variations in integrated-circuit manufacturing, the current trend is to create designs that take these variations into account statistically. In this...
Jason Cong, Puneet Gupta, John Lee
ASPDAC
2008
ACM
127views Hardware» more  ASPDAC 2008»
13 years 6 months ago
Power grid analysis benchmarks
ACT Benchmarks are an immensely useful tool in performing research since they allow for rapid and clear comparison between different approaches to solving CAD problems. Recent expe...
Sani R. Nassif