Abstract— Modular reduction is a fundamental operation in cryptographic systems. Most well known modular reduction methods including Barrett’s and Montgomery’s algorithms lev...
In this paper we propose an architecture for the computation of the double—precision floating—point multiply—add fused (MAF) operation A + (B × C) that permits to compute ...
We introduce an inheritance property and related table lookup structures applicable to simplified evaluation of the modular operations “multiplicative inverse”, “discrete l...
David W. Matula, Alex Fit-Florea, Mitchell Aaron T...
The floating-point unit in the Synergistic Processor Element of the 1st generation multi-core CELL Processor is described. The FPU supports 4-way SIMD single precision and intege...
This paper presents a novel error-free (infinite-precision) architecture for the fast implementation of both 2-D Discrete Cosine Transform and Inverse DCT. The architecture uses a...