A new method of retiming plesiochronous data is described. This method features latency of less than a cell-time and requires only minimal support circuitry. No flow control or ha...
Larry R. Dennison, William J. Dally, Thucydides Xa...
Logic partitioning is an important issue in VLSI CAD, and has been an area of active research for at least the last 25 years. Numerous approaches have been developed and many diff...
This paper presents a method for the optimal state assignment of asynchronous state machines. Unlike state assignment for synchronous state machines, state codes must be chosen ca...