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ARVLSI
1995
IEEE
117views VLSI» more  ARVLSI 1995»
13 years 8 months ago
Recursive layout generation
Louis Monier, Ramsey W. Haddad, Jeremy Dion
ARVLSI
1995
IEEE
151views VLSI» more  ARVLSI 1995»
13 years 8 months ago
Silicon VLSI processing architectures incorporating integrated optoelectronic devices
Huy Cat, Myunghee Lee, Brent Buchanan, D. Scott Wi...
ARVLSI
1995
IEEE
155views VLSI» more  ARVLSI 1995»
13 years 8 months ago
Low-latency plesiochronous data retiming
A new method of retiming plesiochronous data is described. This method features latency of less than a cell-time and requires only minimal support circuitry. No flow control or ha...
Larry R. Dennison, William J. Dally, Thucydides Xa...
ARVLSI
1995
IEEE
124views VLSI» more  ARVLSI 1995»
13 years 8 months ago
An evaluation of bipartitioning techniques
Logic partitioning is an important issue in VLSI CAD, and has been an area of active research for at least the last 25 years. Numerous approaches have been developed and many diff...
Scott Hauck, Gaetano Borriello
ARVLSI
1995
IEEE
179views VLSI» more  ARVLSI 1995»
13 years 8 months ago
Algorithms for the optimal state assignment of asynchronous state machines
This paper presents a method for the optimal state assignment of asynchronous state machines. Unlike state assignment for synchronous state machines, state codes must be chosen ca...
Robert M. Fuhrer, Bill Lin, Steven M. Nowick