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ASPDAC
2007
ACM
77views Hardware» more  ASPDAC 2007»
13 years 9 months ago
Hippocrates: First-Do-No-Harm Detailed Placement
Physical synthesis optimizations and engineering change orders typically change the locations of cells, resize cells or add more cells to the design after global placement. Unfort...
Haoxing Ren, David Z. Pan, Charles J. Alpert, Gi-J...
ASPDAC
2007
ACM
98views Hardware» more  ASPDAC 2007»
13 years 9 months ago
Node Mergers in the Presence of Don't Cares
Abstract-- SAT sweeping is the process of merging two or more functionally equivalent nodes in a circuit by selecting one of them to represent all the other equivalent nodes. This ...
Stephen Plaza, Kai-Hui Chang, Igor L. Markov, Vale...
ASPDAC
2007
ACM
108views Hardware» more  ASPDAC 2007»
13 years 9 months ago
Noise-Direct: A Technique for Power Supply Noise Aware Floorplanning Using Microarchitecture Profiling
This paper proposes Noise-Direct, a design methodology for power integrity aware floorplanning, using microarchitectural feedback to guide module placement. Stringent power constr...
Fayez Mohamood, Michael B. Healy, Sung Kyu Lim, Hs...
ASPDAC
2007
ACM
95views Hardware» more  ASPDAC 2007»
13 years 9 months ago
Low Power Techniques for Mobile Application SoCs Based on Integrated Platform "UniPhier"
In this Paper, we describe the various low power techniques for mobile application SoCs based on the integrated platform "UniPhier". To minimize SoC power dissipation, h...
Masaitsu Nakajima, Takao Yamamoto, Masayuki Yamasa...
ASPDAC
2007
ACM
123views Hardware» more  ASPDAC 2007»
13 years 9 months ago
Coupling-aware Dummy Metal Insertion for Lithography
As integrated circuits manufacturing technology is advancing into 65nm and 45nm nodes, extensive resolution enhancement techniques (RETs) are needed to correctly manufacture a chip...
Liang Deng, Martin D. F. Wong, Kai-Yuan Chao, Hua ...