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ASPDAC
2011
ACM
183views Hardware» more  ASPDAC 2011»
9 years 6 months ago
Multi-core parallel simulation of System-level Description Languages
Rainer Dömer, Weiwei Chen, Xu Han, Andreas Ge...
ASPDAC
2011
ACM
172views Hardware» more  ASPDAC 2011»
9 years 6 months ago
Managing complexity in design debugging with sequential abstraction and refinement
al Abstraction and Refinement Brian Keng and Andreas Veneris University of Toronto ASPASP--DAC 2011DAC 2011
Brian Keng, Andreas G. Veneris
ASPDAC
2011
ACM
215views Hardware» more  ASPDAC 2011»
9 years 6 months ago
An implementation of an asychronous FPGA based on LEDR/four-phase-dual-rail hybrid architecture
—This paper presents an asynchronous FPGA that combines four-phase dual-rail encoding and LEDR (Level-Encoded Dual-Rail) encoding. Four-phase dual-rail encoding is used for small...
Yoshiya Komatsu, Shota Ishihara, Masanori Hariyama...
ASPDAC
2011
ACM
227views Hardware» more  ASPDAC 2011»
9 years 6 months ago
Minimizing buffer requirements for throughput constrained parallel execution of synchronous dataflow graph
– This paper concerns throughput-constrained parallel execution of synchronous data flow graphs. This paper assumes static mapping and dynamic scheduling of nodes, which has seve...
Tae-ho Shin, Hyunok Oh, Soonhoi Ha
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