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ASPLOS
1998
ACM
13 years 8 months ago
Fast Out-Of-Order Processor Simulation Using Memoization
Our new out-of-order processor simulator, FastSim, uses two innovations to speed up simulation 8–15 times (vs. Wisconsin SimpleScalar) with no loss in simulation accuracy. First...
Eric Schnarr, James R. Larus
ASPLOS
1998
ACM
13 years 8 months ago
Data Speculation Support for a Chip Multiprocessor
Thread-level speculation is a technique that enables parallel execution of sequential applications on a multiprocessor. This paper describes the complete implementation of the sup...
Lance Hammond, Mark Willey, Kunle Olukotun
ASPLOS
1998
ACM
13 years 8 months ago
Cache-Conscious Data Placement
As the gap between memory and processor speeds continues to widen, cache efficiency is an increasingly important component of processor performance. Compiler techniques have been...
Brad Calder, Chandra Krintz, Simmi John, Todd M. A...
ASPLOS
1998
ACM
13 years 8 months ago
Segregating Heap Objects by Reference Behavior and Lifetime
Dynamic storage allocation has become increasingly important in many applications, in part due to the use of the object-oriented paradigm. At the same time, processor speeds are i...
Matthew L. Seidl, Benjamin G. Zorn
ASPLOS
1998
ACM
13 years 8 months ago
Active Disks: Programming Model, Algorithms and Evaluation
Several application and technology trends indicate that it might be both pro table and feasible to move computation closer to the data that it processes. In this paper, we evaluat...
Anurag Acharya, Mustafa Uysal, Joel H. Saltz