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CDES
2006
99views Hardware» more  CDES 2006»
13 years 6 months ago
Teraflop Computing for Nanoscience
: Over the last three decades there has been significant progress in the first principles methods for calculating the properties of materials at the quantum level. They have largel...
Yang Wang 0008, G. M. Stocks, Aurelian Rusanu, D. ...
CDES
2006
118views Hardware» more  CDES 2006»
13 years 6 months ago
Improving the System Performance by a Dynamic File Prediction Model
As the speed gap between CPU and I/O is getting wider and wider, I/O latency plays a more important role to the overall system performance than it used to be. Prefetching consecut...
Tsozen Yeh, Joseph Arul, Kuo-Hsin Tien, I-Fan Chen...
CDES
2006
99views Hardware» more  CDES 2006»
13 years 6 months ago
Realization of Digital Fuzzy Operations Using Multi-Valued Fredkin Gates
Multi-valued Fredkin gates (MVFG) are reversible gates and they can be considered as modified version of the better known reversible gate the Fredkin gate. Reversible logic gates ...
Amin Ahsan Ali, Hafiz Md. Hasan Babu, Ahsan Raja C...
CDES
2006
158views Hardware» more  CDES 2006»
13 years 6 months ago
A Double Precision Floating Point Multiplier Suitably Designed for FPGAs and ASICs
In this paper, a double precision IEEE 754 floating-point multiplier with high speed and low power is presented. The bottleneck of any double precision floatingpoint multiplier des...
Himanshu Thapliyal, Vishal Verma, Hamid R. Arabnia