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CHES
2007
Springer
165views Cryptology» more  CHES 2007»
13 years 11 months ago
FPGA Intrinsic PUFs and Their Use for IP Protection
In recent years, IP protection of FPGA hardware designs has become a requirement for many IP vendors. In [34], Simpson and Schaumont proposed a fundamentally different approach to...
Jorge Guajardo, Sandeep S. Kumar, Geert Jan Schrij...
CHES
2007
Springer
118views Cryptology» more  CHES 2007»
13 years 9 months ago
AES Encryption Implementation and Analysis on Commodity Graphics Processing Units
Graphics Processing Units (GPUs) present large potential performance gains within stream processing applications over the standard CPU. These performance gains are best realised wh...
Owen Harrison, John Waldron
CHES
2007
Springer
154views Cryptology» more  CHES 2007»
13 years 11 months ago
Multi-gigabit GCM-AES Architecture Optimized for FPGAs
Abstract. This paper presents a design-space exploration of the Galois/Counter Mode (GCM) algorithm with Advanced Encryption Standard (AES) as underlying block cipher for high thro...
Stefan Lemsitzer, Johannes Wolkerstorfer, Norbert ...
CHES
2007
Springer
126views Cryptology» more  CHES 2007»
13 years 11 months ago
How to Maximize the Potential of FPGA Resources for Modular Exponentiation
This paper describes a modular exponentiation processing method and circuit architecture that can exhibit the maximum performance of FPGA resources. The modular exponentiation arch...
Daisuke Suzuki
CHES
2007
Springer
157views Cryptology» more  CHES 2007»
13 years 11 months ago
A Hardware-Assisted Realtime Attack on A5/2 Without Precomputations
Abstract. A5/2 is a synchronous stream cipher that is used for protecting GSM communication. Recently, some powerful attacks [2,10] on A5/2 have been proposed. In this contribution...
Andrey Bogdanov, Thomas Eisenbarth, Andy Rupp