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ASPDAC
2000
ACM
133views Hardware» more  ASPDAC 2000»
13 years 9 months ago
A VLSI implementation of the blowfish encryption/decryption algorithm
We propose an efficient hardware architecture for the Blowfish algorithm [1]. The speed is up to 4 bit/clock, which is 9 times faster than a Pentium. By applying operator-reschedul...
Michael C.-J. Lin, Youn-Long Lin
DATE
2000
IEEE
75views Hardware» more  DATE 2000»
13 years 9 months ago
Layout Compaction for Yield Optimization via Critical Area Minimization
This paper presents a new compaction algorithm to improve the yield of IC layout. The yield is improved by reducing the area where the faults are more likely to happen known as cr...
Youcef Bourai, C.-J. Richard Shi
STOC
2000
ACM
134views Algorithms» more  STOC 2000»
13 years 9 months ago
Computing the median with uncertainty
We consider a new model for computing with uncertainty. It is desired to compute a function fX1; : : : ; Xn where X1; : : : ; Xn are unknown, but guaranteed to lie in speci ed i...
Tomás Feder, Rajeev Motwani, Rina Panigrahy...
DATE
2000
IEEE
140views Hardware» more  DATE 2000»
13 years 9 months ago
Parallel and Distributed VHDL Simulation
This paper presents a methodology for parallel and distributed simulation of VHDL using the PDES (parallel discrete-event simulation) paradigm. To achieve better features and perf...
Dragos Lungeanu, C.-J. Richard Shi