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CSREAESA
2003
13 years 5 months ago
2003
− This paper presents an efficient system level power saving method for DRAM with multiple power modes. The proposed method is based on the power aware scheduling algorithm that ...
CSREAESA
2003
13 years 5 months ago
2003
Energy dissipation in cache memories is becoming a major design issue in embedded microprocessors. Predictive filter cache based instruction cache hierarchy is effective in reduci...
CSREAESA
2003
13 years 5 months ago
2003
This paper presents a comparison of power-aware video decoding techniques that utilize Dynamic Voltage Scaling (DVS) capability. Three techniques were simulated and compared in te...
CSREAESA
2003
13 years 5 months ago
2003
Future embedded systems (ES) will offer higher computation capacity than existing embedded systems. New applications of these ES require more and more memory resources and more an...
CSREAESA
2003
13 years 5 months ago
2003
Most so-called “adiabatic” digital logic circuit families reported in the low-power design literature are actually not truly adiabatic, in that they do not satisfy the general...