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CSREAESA
2006
13 years 6 months ago
2006
The performance of software executed on a microprocessor is adversely affected by the basic fetchexecute cycle. A further performance penalty results from the load-execute-store p...
CSREAESA
2003
13 years 6 months ago
2003
This paper presents a comparison of power-aware video decoding techniques that utilize Dynamic Voltage Scaling (DVS) capability. Three techniques were simulated and compared in te...
CSREAESA
2003
13 years 6 months ago
2003
Future embedded systems (ES) will offer higher computation capacity than existing embedded systems. New applications of these ES require more and more memory resources and more an...
CSREAESA
2003
13 years 6 months ago
2003
Energy dissipation in cache memories is becoming a major design issue in embedded microprocessors. Predictive filter cache based instruction cache hierarchy is effective in reduci...
CSREAESA
2009
13 years 6 months ago
2009
A Built-In Self-Test (BIST) approach is presented for the Internal Configuration Access Port (ICAP) and Frame Error Correcting Code (ECC) logic cores embedded in Xilinx Virtex-4 an...